(竹北)IC layout Designer

【工作內容】
作為華邦的(竹北)IC layout Designer，你將負責替客戶設計符合需求的電路圖，與製程研發/CAD/產品測試/FAE等團隊合作，完成重要專案。工作內容包含：
1. DRAM/Flash Array and Periphery layout.
2. Analog and Mixed signal full custom IC layout.
3. Full chip layout and verification.
4. Mask data verification.
5. ESD protection.
6. Knowledge of EDA tools (OPUS, Laker, Virtuoso, Caliber, etc)
7. Ability to read complex design.
8. Work with designer engineer to optimize layout.
9. Ability and good personality to work as a team.

【條件要求】

學歷要求：大學
科系要求：電機電子工程相關 │ │
相關經驗：7年以上
語言能力：英文 高級 │ │
管理責任：No
輪班需求：No
出差需求：無
外派需求：No
其他條件：
1. Layout automation, Auto placement and route.
2. LVS and DRC setup and problem solving during verification.
3. Understanding the physical reason about DRC, LVS, and ERC.
4. Be aware of CMOS design rule and ESD rule.
5. Good working knowledge of UNIX/Linux and scripting languages like TCL.
6. Comprehension of isolation issues and ability to create effective shielding/ isolation structure.
7. Layout techniques for issues like parasitic resistance, capacitive coupling, matching, latchup, etc.
8. Creativity, analytical mind and problem solving skills.